The present invention relates to a charge amount detection circuit for use in an image sensor such as an X-ray sensor such as using and relates to a two-dimensional image sensor using such a charge amount detection circuit.
First, the following description deals with an image sensor having a general two-dimensional matrix structure with reference to FIGS. 1 through 9 that are diagrams for explaining the present invention and FIG. 13.
The image sensor can be used in an X-ray diagnosis apparatus when it is functioned as an X-ray sensor for detecting X-rays, for example.
In an image sensor 48 shown in FIG. 1, is provided with a photoelectric conversion layer 54 and a bias electrode 52 on a glass substrate 50. The photoelectric conversion layer 54 is formed by a thin film made of amorphous selenium or other materials. The bias electrode 52 is formed by a metal film that transmits the X-rays, for example a conductive layer such as gold. On the surface of the photoelectric conversion layer 54 side of the glass substrate 50, pixel electrodes 56 that are provided in a matrix manner, a storage capacitor (pixel capacitance) 17, switching devices 18, scanning lines 10 (column), and data lines 12 (row). The scanning lines 10 and the data lines 12 are connected with a scanning driver (gate driver) 14 and a reading circuit 16, respectively.
Thus, the image sensor 48 is mainly composed of a photoelectric conversion layer 54 and an accumulation capacitor 17, i.e., is composed of (a) a photoelectric section for converting photons such as X-rays into charges and storing the charges and (b) a reading circuit (charge amount detection circuit) 16 for reading a signal relating to the stored charges from the photoelectric section.
The pixel electrode 56 is connected with the data line 12 through the switching device 18. The switching operation of the switching device 18 is carried out in response to a voltage sent by the scanning driver 14 through the scanning line 10. In the case of a thin film transistor (hereinafter referred to as TFT) that is generally used as the switching device 18, a source of the TFT is connected with the pixel electrode 56, a drain of the TFT is connected with the data line 12, and a gate of the TFT is connected with the scanning line 10. In the following description, it is assumed that the TFT is used as the switching device 18.
FIG. 2 is a cross-sectional view taken along line Axe2x80x94A in FIG. 1. An auxiliary electrode 60 is provided so as to face the pixel electrode 56 through an insulating film 58. The storage capacitor 17 is formed by the pixel electrode 56, the auxiliary electrode 60, and the insulating film 58 provided therebetween. The auxiliary electrode 60 is wired so that a common reference voltage (Vref) is applied to all pixel electrodes 22. The bias electrode 52 can apply a high voltage (for example, several thousands of voltages) to the pixel electrode 56.
When X-ray photons 68 are incident on the image sensor 48 from the bias electrode 52 side, the X-ray photons 68 that have transmitted the bias electrode 52 generates electron-hole pairs in the photoelectric conversion layer 54. In the case where a positive voltage is applied to the bias electrode 52 side, the holes move toward the pixel electrode 56 so as to arrive at the pixel electrode 56 located in a position corresponding to the position on which the photon 68 are incident. In the case where a negative voltage is applied to the bias electrode 52 side, the electrons move toward the pixel electrode 56 so as to arrive at the pixel electrode 56 located in a position corresponding to the position on which the photon 68 are incident. The holes or electrons that have arrived at the pixel electrode 56 are stored by the capacitor 17. The charges having positive polarity or negative polarity that have been stored by the capacitor 17 (hereinafter referred to as signal charges) are outputted to the data line 12 in response to the switching-on of the switching device 18 of TFT, and the charged amount (signal charge amount) is read out by the reading circuit 16 that is connected with the data lines 12.
When the scanning driver 14 outputs a voltage of a high level to a target scanning line 10, all the TFTs connecting with the scanning line 10 turn on. The signal charges stored by each capacitor 17 flows out to the corresponding data line 12. The scanning driver 14 consecutively outputs a voltage of a high level to the respective scanning lines 10, thereby resulting in that the data of all the pixel electrodes 56 are read out. Thus, the image data of one page are read out.
The following description deals with the reading circuit 16 which is used in the image sensor 48. FIG. 3 is a circuit diagram showing a basic structure of a charge sensitive amplifier (hereinafter referred to as CSA) 20 used for reading out the charge amount. In an operational amplifier 20a, an inverted input terminal and an output terminal are connected with each other through a feedback capacitor 20b so as to form a negative feedback circuit. A reset switch 20c is connected in parallel with the feedback capacitor 20b so that the resetting is carried out by discharging the charges stored in the feedback capacitor 20b. The data line 12 is connected with the inverted input terminal of the operational amplifier 20a, and a non-inverted input terminal is connected with a reference voltage GND.
FIG. 4 is an equivalent circuit for reading one pixel 22 including the switching devices 18 and the capacitor 17. FIG. 5 is a graph showing the timing for the reading operations and the output voltage of the CSA 20 in FIG. 4.
In FIG. 4, it is assumed that the pixel 22 indicates a pixel connected with a scanning line 10i and a data line 12j. The scanning line 10i corresponds to a scanning line 10 of the i-th column and the data line 12j corresponds to a data line 12 of the j-th row. Note that Cdl indicates a capacitance of the data line 12j. In FIG. 5, G(i) indicates a voltage outputted to the scanning line 10i, and Rst indicates a reset signal outputted to the reset switch 20c. 
According to the reading operation, first, the reset switch 20c turns on (period A). This causes the charges that have been stored in the feedback capacitor 20b in the previous operation to be discharged so as to carry out the resetting. As a result, the output voltage of the CSA 20 reduces to the reference voltage GND, i.e., zero. Then, Rst becomes a voltage of a low level (period D), a voltage of a high level is outputted to G(i) so that the switching device 18 of TFT turns on. The signal charge (xe2x88x92Q) stored in the capacitor 17 flows out to the data line 12j. The operational amplifier 20a operates so that all the signal charge (xe2x88x92Q) that have flowed out to the data line 12j are collected to an electrode of the input side of the feedback capacitor 20b. Thus, the same amounts of charge (+Q) having negative polarity are come out on an electrode of the output side of the feedback capacitor 20b. Finally, the CSA 20 outputs a voltage obtained by dividing the charge Q that corresponds to the signal charge by the capacitance of the feedback capacitor 20b (period B). By reading such a voltage, it is possible to detect the signal charge as a voltage. After a little while is passed since a voltage of a low level is outputted to G(i) of this column (period C), the Rst is reset again for another reading operation of the next column, thereby resulting in that the output voltage of the CSA 20 returns to the reference voltage GND.
The following description briefly deals with a voltage reading method that is so called as a correlated double sampling (hereinafter referred to as CDS). If the circuit system shown in FIG. 4 is perfect, the voltage that has been read during the period C must correctly correspond to the signal charge amount. In actual, however, during the period D after the resetting, the output voltage of the CSA 20 is not perfectly equal to the reference voltage GND, thereby causing the generation of an offset voltage. Such an offset voltage is generated due to (a) an offset or a flicker noise of the operational amplifier 20a and/or (b) a feed through phenomenon occurred when the TFT (switching devices 18) and/or the reset switch 20c turn on and off. The field through phenomenon is essential to MOS switches. According to this phenomenon, the channel charges caught during the turning-on by (a) a capacitor formed by the gate and the source and (b) a capacitor formed by the gate and the drain are released in response to the decreasing of the gate voltage so as to flow out to the drain and the source.
The CDS reads out the voltage of the CSA 20 in accordance with the respective timings of smp1 and smp2 shown in FIG. 5. By finding the difference between the voltages read out in accordance with the respective timings smp1 and smp2, it is possible to find with accuracy the voltage fluctuation of the CSA 20 during the period between the timings smp1 and smp2. Thus, the CDS is carried out so that the offset occurred during period D is removed. This means that it is possible to deal with in the same manner as the case where the voltage is read out only once during period C in an ideal circuit system in which no offset is occurred during the period D. Note that since the CDS is not directly correlated to the present invention, the following description is dealt with for the convenience of explanation assuming that the reading out operation is carried out only once during the period C in an ideal circuit system that can be dealt with as equivalent by the CDS.
FIG. 13 is a circuit diagram showing a structure of a reading circuit (hereinafter referred to as a unit reading circuit) for a single input. According to the unit reading circuit, the signal charge is outputted as a digital data. The output of the CSA is amplified by a voltage amplifier circuit (main amplifier) MA and is sampled and held by a sampling hold circuit S/H. The voltage thus held is sent to an A/D (analog to digital) converter ADC through a multiplexer so as to be converted to a digital value, and is held by a data latch circuit DL. Note that the multiplexer is provided for assigning a plurality of input terminals to a single ADC and is not essential to the circuit. Accordingly, such a multiplexer is not necessary in the case where an ADC is arranged so as to correspond to each input terminal one to one.
The main amplifier MA is provided for fully amplifying the signal voltage to the range in which following circuits can appropriately operate when the output of the CSA is small.
The radiography apparatus is generally used in a static picture filming (filming mode). In this case, the amount of the X-rays to be projected is fully large. Since the signal charge amount is also so large that a fully large voltage is come out in the CSA, it is not always necessary to provide the main amplifier MA. In contrast, in the case where a dynamic picture is obtained (fluoroscopy mode), it is necessary to keep projecting the X-rays during a period of time between several seconds and several minutes. To suppress the total amount of the X-rays to be projected, X-rays which have two-order weaker intensity than that of the filming mode are used. Thus, the signal charge amount in the fluoroscopy mode is extremely little compared with the filming mode, thereby necessitating the provision of the main amplifier MA. Note that two-stage of main amplifier configuration is used in accordance with the required amplification though the main amplifier MA is indicated as a single block in FIG. 13.
FIG. 6 shows a typical example of the structure of the main amplifier MA. The example shown in FIG. 6 uses an inverted amplifier circuit realized by an operational amplifier. The amplification is determined in accordance with the ratio of Rb/Ra, Ra and Rb being indicative of registers, respectively.
FIG. 7 shows one example of how the signal charge amount varies depending on the X-ray amount (X-ray intensity) of a-Se photoelectric conversion layer. Note that the absolute value of the vertical axis varies depending on the thickness of the photoelectric conversion layer, the bias voltage to be applied, and pixel size, respectively. Line A indicates the signal charge amount, and line B indicates the quantum noise. In this case, the signal charge amount of about 8,000 e-rms is generated for the X-ray amount of 0.1 xcexcR, while the signal charge amount of about 1,000,000 e-rms is generated for the X-ray amount of 30 xcexcR. Note that 1R (1 roentgen) indicates the projecting amount of the X-rays required for the generation of unit charge per 1 cm3 air, and corresponds to 2.58xc3x9710xe2x88x924C/kg. Note also that xe2x80x9ce-rmsxe2x80x9d indicates the number of electrons expressed by rms (root mean square). In other words, the expectation value of the number of electrons that will be generated (detected). Here, since 0.1 xcexcR is the minimum dose in the fluoroscopy mode and 30 xcexcR is the minimum dose in the filming mode, it is clear that the signal charge amount generated in the fluoroscopy mode is about {fraction (1/100)} of the filming mode. When this is converted into the voltage outputted from the CSA 20, 0.128 mV and 16 mV correspond thereto, respectively, when the feedback capacitor 20b is 10 pF. In this case, it is possible to make the operation voltage range of the circuits following the sampling hold circuit S/H be substantially equal to that of the filming mode.
By the way, the quantum noise that has been generated increases a slope of xc2xd with respect to the signal charge amount. The quantum noise decreases as the dose becomes stronger. In general, the dose used in the filming mode is 300 times as large as that in the fluoroscopy mode. This means that the quantum noise in the filming mode is {fraction (1/17)} of the quantum noise in the fluoroscopy mode. In other words, it is clear that the quantum noise in the fluoroscopy mode requires much more severe measures therefor than in the filming mode.
The following description deals with the noise generated by the reading circuit 16.
The operational amplifier 20a constituting the CSA (charge sensitive amplifier 20) itself generates the noise power. The main reason thereof is the thermal noise that the circuit element constituting the operational amplifier 20a generates. The thermal noise is come out as the white noise whose frequency range extends to the high frequency. The noise power varies in proportion to the square root of the frequency band of the circuit. Accordingly, it is possible to reduce the output noise by cutting the unnecessary high frequency components. For example, when comparing the case where the frequency band of the circuit system between the CSA and the sampling hold circuit 10MHz with the case of 100 kHz, the noise power of the former case is 10 times as large as the latter case, provided that the other conditions are the same. Accordingly, it is preferable not to unnecessarily broaden the frequency band of the circuit system, i.e., it is preferable to cut the high frequency components that are unnecessary for the operations of the circuit.
It is possible to cut the unnecessary high frequency components by using a low pass filter (LPF). It is possible to get the larger effect by providing the LPF on the upstream side of the circuit as long as the circumstances permit. Accordingly, the LPF may be provided between the CSA and the main amplifier MA like the unit reading circuit shown in FIG. 8.
FIG. 9 shows the first order LPF having the simplest structure. Since the first order LPF is constituted by a resistor R and a capacitor C, the area required for the LPF causes the area of LSI to increase. By the way, in the case of the radiography apparatus, the pixel pitch of the sensor falls within the range between 100 xcexcm and 150 xcexcm, and the number of the data lines and the scanning lines fall within the range between 1,000 and 3,000, respectively. The unit reading circuit shown in FIG. 13 or FIG. 8 should be provided for each data line. Accordingly, the width of the space permitted for each unit reading circuit is also limited to the size not larger than this size. It is not always easy to provide the LPF in such limited space. Even if it is possible to do so, it can not be avoided making the chip size increase, thereby causing the cost to become high, accordingly.
It is an object of the present invention to provide a charge amount detection circuit and a two-dimensional image sensor using same which suppress the enlargement of the chip size due to the provision of LPF as much as possible so as to suppress the rise of the chip cost as much as possible.
In order to achieve the foregoing object, a charge amount detection circuit in accordance with the present invention in which a charge sensitive amplifier is followed by a low pass filter circuit and the low pass filter circuit is followed by a voltage amplifier circuit, is characterized in that one part of circuit elements constituting the low pass filter circuit and one part of circuit elements constituting the voltage amplifier circuit is commonly used.
With the arrangement, the low pass filter circuit and the voltage amplifier circuit share one part of the circuit elements that constitute the respective circuits. Accordingly, it is possible to reduce the size corresponding to the one part of the circuit elements thus shared, so that the chip size is reduced on the whole. Thus, it is possible to suppress the enlargement of the chip size due to the provision of the low pass filter circuit as much as possible so as to suppress the rise of the chip cost as much as possible.
A two-dimensional image sensor in accordance with the present invention is characterized by having the charge amount detection circuit.
Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus, are not limitative of the present invention.